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The pursuit of high-performance, energy-efficient artificial intelligence (AI) opens exciting opportunities for emerging semiconductor memories and unconventional architectures. To maximize the potential of emerging computing technologies, innovations across the stack (from devices to architecture) become critical. In this talk, I will present our recent hardware-software co-design efforts in exploiting beyond-complementary-metal-oxide-silicon (CMOS) microelectronics for developing efficient deep neural network (DNN) hardware accelerators. We will investigate how to co-design the emerging microelectronics and crossbar architecture to address two major challenges of compute-in-memory: the analog functional errors and the peripheral overhead of analog-to-digital conversion. Furthermore, we will exploit the device physics of emerging non-volatile memory to enable stochastic and approximate computation, thereby achieving an optimal trade-off between efficiency and accuracy for AI inference. Our device-to-system co-optimization demonstrates exciting opportunities for beyond-CMOS microelectronics in developing the next-generation efficient compute systems for edge sensing and precision agriculture applications.

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Cheng Wang is an Assistant Professor of Electrical and Computer Engineering at Iowa State ³Ô¹ÏÍø. Cheng received his B.S. degree in Physics from Peking ³Ô¹ÏÍø in 2009 and completed his Ph.D. at the ³Ô¹ÏÍø of Texas at Austin in 2016, with his dissertation on emerging non-volatile and spintronic memories. Prior to joining Iowa State, Cheng was a Research Scientist at the Center for Brain-inspired Computing Enabling (C-BRIC) at Purdue ³Ô¹ÏÍø. Cheng worked as a Staff R&D Engineer at Seagate Research Center from 2016 to 2019, where he designed high-density magneto-electronic memory and storage technologies. His current research interests include machine learning hardware acceleration and energy-efficient neuromorphic computing with emerging technologies and architectures. He has served on the Technical Program Committee for beyond-CMOS and emerging technologies for IEEE/ACM Design Automation Conference (DAC), International Conference on Computer-Aided Design (ICCAD), and Great Lakes Symposium on VLSI. He is a recipient of the NSF CAREER Award, Seagate FRC Technical Award, and Best Paper Awards for the IEEE International Conference on Rebooting Computing (ICRC) and IEEE Cross-disciplinary Conference on Memory-Centric Computing.